Resume

Vijayaraghavan Soundararajan

Work Address:
352 Gates Hall
Stanford University
Stanford, CA 94305
(650) 725 1683
email: ravi@powderkeg.stanford.edu

Objective

A challenging position in parallel processing, specializing in applications development and multiprocessor performance evaluation.

Education

Stanford University
Candidate for Doctor of Philosophy in Electrical Engineering, expected September 1999
Dissertation title: "Flexible Use of Memory for Replication/Migration in Cache-Coherent DSM Multiprocessors"
Advisor: Dr. Anoop Gupta

Stanford University

Master of Science in Electrical Engineering. June, 1994.

Massachusetts Institute of Technology

Bachelor of Science in Electrical Engineering. June, 1992.
Concentration in Theater Arts.

Experience

Stanford University
Computer Systems Laboratory
Fall 1992-Present
Graduate Research Assistant with Professor Anoop Gupta. Thesis work involves investigating hardware and software techniques for data migration and replication in shared-memory multiprocessors. Implemented and evaluated memory-based remote data cache and Cache-Only Memory Architecture (COMA) in the context of the Stanford FLASH multiprocessor. Evaluated these schemes versus OS-assisted page-based replication and migration, and proposed a novel hybrid hardware/software technique, MIGRAC, for replication/migration. Previous non-thesis work involved studying mechanisms and performance of hybrid hardware and software distributed-shared memory protocols on tightly-coupled and loosely-coupled hardware-based cache-coherent systems.

Stanford University

Computer Systems Laboratory
March 1999-June 1999
Teaching Assistant, "Parallel Computer Architecture and Programming." Responsible for assisting professors with developing problem sets, programming projects, and exams. Also responsible for holding office hours, leading review sessions, and grading.

Kurzweil Technologies

Waltham, MA
Independent Consultant
June 1995-October 1995, June 1997-October 1997
Assisted in compiling a patent portfolio by researching current microprocessor design techniques and suggesting patentable technologies. Also performed prior art search in data visualization technologies.

Compaq Computer Corporation (formerly Digital Equipment Corporation)

Systems Research Center
Palo Alto, CA
Summer Intern
June 1995-October 1995
Implemented a user-level parallel filesystem for use with I/O-intensive parallel applications. Wrote the parallel applications used for evaluation, including parallel copy, parallel UNIX grep, and parallel UNIX cmp.

Massachusetts Institute of Technology

Laboratory for Computer Science
Summer 1991-Fall 1992
Worked with Professor Anant Agarwal on the Alewife Shared-Memory Multiprocessor. Studied Register File designs for Multithreaded Architectures. Designed small scale dribble-in, dribble-out register file and wrote simulator for comparison of design with multiple register set and context cache designs. Wrote test vectors for Alewife cache controller. Designed test hardware for determining characteristics of network interface chip.

Publications

  • ``A Quantitative Analysis of the Performance and Scalability of Distributed Shared Memory Cache Coherence Protocols,'' M. Heinrich, V. Soundararajan, J. Hennessy, and A. Gupta, To appear in IEEE Transactions on Computers Special Issue on Cache Memory and Related Problems, February 1999.

  • ``Flexible Use of Memory for Replication/Migration in Cache-Coherent DSM Multiprocessors,'' V. Soundararajan, M. Heinrich, B. Verghese, K. Gharachorloo, A. Gupta, and J. Hennessy, in Proceedings of 25th International Symposium on Computer Architecture, July, 1998.

  • ``Performance Evaluation of Hybrid Hardware and Software Distributed Shared Memory Protocols,'' Rohit Chandra, Kourosh Gharachorloo, Vijayaraghavan Soundararajan, and Anoop Gupta, in Proceedings of the Eighth ACM International Conference on Supercomputing, July, 1994.

  • ``Dribbling Registers: A Mechanism for Reducing Context Switch Latency in Large-Scale Multiprocessors,'' Vijayaraghavan Soundararajan, MIT/LCS Technical Memo TM-474, June 1992

    • Activities/Honors

  • MIT Shakespeare Ensemble, Intramural Athletics, Freshman tutoring
  • Stanford Tae Kwon Do Club
  • Teaching science to underprivileged elementary school students.
  • Recipient of William A. Martin Prize for best undergraduate bachelor's thesis in computer science.
  • Tau Beta Pi, Eta Kappa Nu, and Sigma Xi honorary societies.

    • Background/Interests

  • United States Citizen. Enjoy drama, tae kwon do, sports, and reading.

    • Back home.