The TORCH architecture and instruction scheduler were orginally developed by Michael D. Smith as part of his thesis work here at Stanford.
The first RTL model was developed by John Maneatis, Drew Wingard, Phil Lacroute, Don Ramsey, and Tom Chanak in the summer of 1991. This model was written in THOR and contained most of the basic functionality but was not very detailed.
The second RTL model was developed as part of a class in the Autumn of 1991/92. During the Winter and Spring of that same year we worked hard at improving the model. It was then that we first separated the control and datapath blocks for easier synthesis. Among those involved in the project where, Seye Ewedemi, a.k.a "The Seye", Ricardo Gonzalez, Richard Ho, Tom Indermaur, Stefanos Sidiropoulos, Dave Smentek, Jonathan Su, and Gerard Yeh.
During the following years TORCH lay dormant. Samuel Naffziger started work an a floating-point unit for TORCH but unfortunately had to go back to HP before he had time to complete it. Although we had planned to use the model to perform architectural studies in the area of Energy Efficient Processor Design we were busy with other tasks.
Interest in TORCH re-awakened when The Stanford FLASH project used the Verilog model, the software tools, and the simulator as a starting platform to develop the Protocol Processor for MAGIC. At the same time we started work again to improve the Verilog model to make it available to other interested parties.
Throughout it all Mark Horowitz has been the leading our efforts. Without him we would still be more confused than we are now.
Back to TORCH Home Page